Synopsys to Acquire Certain IP Assets of INVECAS
MOUNTAIN VIEW, Calif., Feb. 13, 2020:— Acquisition Broadens DesignWare IP Portfolio and Adds a Team of Experienced R&D Engineers to Accelerate Physical IP Development.
- Acquisition of INVECAS IP broadens Synopsys’ DesignWare Logic Library, General Purpose I/O, Embedded Memory, Interface and Analog IP portfolio
- Acquisition of IP enables Synopsys to further address the growing requirements of consumer, IoT and automotive designs
- Addition of experienced R&D engineers accelerates physical IP roadmap across a range of process technologies, including 22-nm processes
Synopsys, Inc. (Nasdaq: SNPS) today announced that it has signed a definitive agreement to acquire certain IP assets of INVECAS, headquartered in Santa Clara, California. This acquisition will broaden Synopsys’ DesignWare® Logic Library, General Purpose I/O, Embedded Memory, Interface and Analog IP portfolio. The acquisition will also add a team of experienced R&D engineers to accelerate Synopsys’ physical IP roadmap across a range of process technologies to address customers’ evolving design requirements in markets such as consumer, IoT and automotive. INVECAS will retain its HDMI IP and ASIC Design Solutions businesses.
The transaction, which is expected to close the first half of fiscal 2020 and is subject to customary closing conditions, is not material to Synopsys’ financials. Terms are not being disclosed.
“With more functionality being integrated into a single chip, high-quality IP continues to be key for enabling designers to speed time-to-market, while reducing risk,” said Joachim Kunkel, general manager of the Solutions Group at Synopsys. “With this acquisition, Synopsys is broadening our DesignWare IP portfolio to address the requirements of consumer, IoT and automotive designs and adding a strong R&D engineering team to meet the growing IP needs of our customers.”
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare® IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys’ extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit www.synopsys.com/designware.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at . www.synopsys.com/.
INVECAS is a world class Product Engineering Company that provides custom solutions for the semiconductor industry. Our large pool of well-trained engineers can offer design services from Application Software to Transistor Level Layout in advance technology nodes including 6nm. Customers take advantage of our extensive experience in co-developing hardware and software under one roof to translate their ideas into real products. Our turnkey engagement model allows our customers to rely on warranties provided on work performed. With the experience of shipping millions of production worthy silicon to hundreds of customers, INVECAS, is your trusted partner to deliver designs on time with the quality you expect.
SOURCE : SYNOPSYS