INVECAS novate
INVECAS fluence
INVECAS spire

Desired Skills and Experience:

INVECAS novate
INVECAS fluence
INVECAS spire

You will be part of Front End Team where you will be accountable for Fullchip Timing Closure. Working / leading Fullchip Timing unconstraints endpoints and no clock issues, Timing synchronizer Failure rate. Work Closely with Design team to resolve timing related issues.

Desired Skills and Experience:

INVECAS novate
INVECAS fluence
INVECAS spire

 
 

Desired Skills and Experience:

INVECAS novate
INVECAS fluence
INVECAS spire

Responsible for Synthesis Constraints development, LINT checks, CDC checks. Working / leading full-chip STA closure, defining mode requirements & corners for timing closure. Formal Verification-Synopsys Formality. You will be working on low power designs. Work Closely with Physical Design team to resolve any timing related issues with 3+ years of experience.

Desired Skills and Experience: