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Memory Design Engineer

ハイデラバード

  • Full custom circuit design involving memory arrays like multi-port register files, SRAMs, and/or caches, for performance critical IPs like CPUs/GPUs.
  • Design cutting-edge SRAM circuits using state-of-the-art technology processes
  • Optimize circuits for performance, area, and power
  • You will have to perform transistor level circuit and logic design, spice verification, schematic entry and coordination with layout team.
  • Ability to understand architectural specifications and develop custom SRAM circuits which meet stringent performance, area and power requirements.
  • Ability to close design to the specs by running various flows like EM, IR, Noise, static timing analysis.
  • Develop state of the art flows for timing, EM/IR or other verification needs.
  • Improve/develop flows, methodologies and automation to accelerate various design closure, data collection, and analysis, further ensure working silicon

Desired Skills and Experience:

  • You would need to have sound fundamentals in CMOS devices, basics of VLSI design.
  • Prior experience is required with hspice simulations, variation analysis and transistor level design.
  • Proficiency in Perl/Python or equivalent scripting language is a requirement.
  • Prior exposure to some form of memory design (like SRAMs or register files) will be a huge advantage.
  • Good interpersonal skills, should be an excellent teammate.
  • BE/M-Tech in Electrical & Electronics or equivalent.