INVECAS novate
INVECAS fluence

Verification (SoC)Engineer



  • 5-10 Years


Verification methodology and infra development to work with Designers and Architects to define,
and implement IP and SOC test,  plan, Development and execution, in a team environment of self-
checking tests for complex ASICs/FPGAs. Work closely with board, diagnostics and software teams
for ASIC/FPGA bring-up

Job Requirements:

  • 4+ years verification experience of complex SOCs
  • experience with OVM/UVM based constrained random verification
  • years of hands-on experience with CPU based design/verification
  • years of experience with AXI/AHB
  • Good knowledge of processor based system designs
  • Excellent debugging skills
  • In-Depth understanding of pre- and post-silicon verification, and validation methodology
  • Design bring up and debug on FPGA
  • Worked on PCI Express/DDR4/LPDDR4/DSP/ARM processor